pl 133 - 37 low - power , 1.62v to 3.63v , 1 mhz to 150 mhz, 1:3 fan o ut buffer ic micrel inc. ? 2180 fortune drive ? san jose, ca 95131 ? usa ? tel +1(408) 944 - 0800 ? fax +1(408) 474 - 1000 ? www.micrel.com rev 02/ 24 /15 page 1 features ? 3 lvcmos outputs ? 12 m a o utput d rive s trength ? input/output f requency: o reference clock: 1m hz to 1 5 0mhz ? supports lvcmos or sine wave input clock ? very l ow jitter and phase noise ? low c urrent c onsumption ? single 1.8v, 2.5v, or 3.3v , 10% p ower s upply ? op erating temperature range o 0c to 70c (commercial) o - 40 c to 85 c (industrial) ? available in sot23 - 6l green/rohs compliant packages description the pl133 -3 7 is an advanced fanout buffer design for high perfor m ance, low - power, small form - factor applications. the pl133 -3 7 a c cepts a refer ence clock input of 1mhz to 15 0 mhz and produces three ou t puts of the same frequency. reference clock i n- puts may be lvcmos or sine - wave signals (the i n- puts are internally ac - coupled ). offered in a small 3 mm x 3mm sot23, the pl133 -3 7 o f fers the best phase noise and jitter performance and lowest power co n sumption of any comp a rable ic. package pin co n figuration block diagram fin clk0 clk1 clk2 12 3 4 5 6 clk 1 gnd fin clk 2 clk 0 vdd s ot 23 - 6 l downloaded from: http:///
pl 133 - 37 low - power , 1.62v to 3.63v , 1 mhz to 150 mhz, 1:3 fan o ut buffer ic micrel inc. ? 2180 fortune drive ? san jose, ca 95131 ? usa ? tel +1(408) 944 - 0800 ? fax +1(408) 474 - 1000 ? www.micrel.com rev 02/ 24 /15 page 2 pin description name package pin # type description sot23 - 6l clk1 1 o output clock gnd 2 p ground connection fin 3 i reference clock input clk0 4 o output clock vdd 5 p power supply clk2 6 o output clock layout recommendations the following guidelines are to assist you with a performance optimized pcb design: signal integrity and termination co n siderations - keep traces short! - trace = inductor. with a capacitive load this equals ringing! - l ong trace = transmission line. without proper te rm i- nation this will cause reflections (looks like ringing). - design long traces as ?striplines? or ?microstrips? with defined impedance. - match trace at one side to avoid reflections bouncing back and forth. decoupling and power supply consi d erations - place decoupling capacitors as close as possible to the v dd pin(s) to limit noise from the power supply - multiple v dd pins should be decoupled separately for best performance. - addition of a ferrite bead in series with v dd can help prevent noise from other board sources - value of decoupling capacitor is frequency d e- pendant. typica l value to use is 0.1 f. typical cmos termination place series resistor as close as possible to cmos output cmos output buffer (typical buffer impedance 20 ) to cmos input series resistor use value to match output buffer impedance to 50 trace. typical value 30 50 line downloaded from: http:///
pl 133 - 37 low - power , 1.62v to 3.63v , 1 mhz to 150 mhz, 1:3 fan o ut buffer ic micrel inc. ? 2180 fortune drive ? san jose, ca 95131 ? usa ? tel +1(408) 944 - 0800 ? fax +1(408) 474 - 1000 ? www.micrel.com rev 02/ 24 /15 page 3 electrical specifications absolute maximum ratings parameters symbol min. max. units supply voltage range v dd - 0.5 4.6 v input voltage range v i - 0.5 v dd +0.5 v output voltage range v o - 0.5 v dd +0.5 v storage temperature t s - 65 150 c ambient operating temper a ture* - 40 85 c exposure of the device under conditions beyond the limits specified by maximum rati ngs for extended periods may cause permane nt damage to the device and affect product reliability. these conditions repr e sent a stress rating only, and functional operations of the device at these or any other conditions above the operational limits noted in this specif i cation is not implied. *operating temperature is guaranteed by design. parts are tested to commerci al grade only. ac specifications parameters conditions min. typ. max. units input (fin) fr e quency 2.5v and 3.3v oper a tion 1 150 mhz 1.8v operation 1 100 mhz input (fin) signal ampl i tude internally ac coupled , < 150mhz, vdd=2.5v and 3.3v. 0.8 v dd v pp internally ac coupled , < 100mhz, all vdds 0.5 v dd v pp internally ac coupled , 3.3v < 50mhz, 2.5v < 40mhz, 1.8v < 15mhz 0.1 v dd v pp output enable time oe function; ta=25 o c, 15pf load 10 ns output rise time 15pf load, 1 0/ 9 0%v dd , 3.3v 2 3 ns outpu t fall time 15pf load, 9 0/ 1 0%v dd , 3.3v 2 3 ns duty cycle input duty cycle is 50% 45 50 55 % output to output skew all outputs equally loaded 250 ps dc specifications parameters symbol conditions min typ max units supply current, dynamic i dd v dd = 3.3v, 25mhz, no load 1.2 ma v dd = 2.5v, 25mhz, no load 0.9 ma v dd = 1.8v, 25mhz, no load 0.6 ma supply current, standby i dd_sb oe pin pulled low , v dd = 3.3v 0.3 ma operating vol t age v dd 1.62 3.63 v output low voltage v ol i ol = +12 ma , v dd = 3.3v 0.4 v output high voltage v oh i oh = - 12 ma , v dd = 3.3v 2.4 v output current i osd v ol = 0.4v, v oh = 2.4v , v dd = 3.3v 12 ma downloaded from: http:///
pl 133 - 37 low - power , 1.62v to 3.63v , 1 mhz to 150 mhz, 1:3 fan o ut buffer ic micrel inc. ? 2180 fortune drive ? san jose, ca 95131 ? usa ? tel +1(408) 944 - 0800 ? fax +1(408) 474 - 1000 ? www.micrel.com rev 02/ 24 /15 page 4 noise characteristics p arameter symbol conditions min t yp m ax u nit additive phase jitter v dd =3.3v, fr e quency=26mhz offset=12k hz ~ 5mhz 70 fs v dd =3.3v, fr e quency=100mhz offset=12k hz ~ 20mhz 80 fs pl133-37 additive phase jitter: vdd=3.3v, clk=26mhz, integration range 12khz to 5mhz: 0.072ps typical. -170 -160 -150 -140 -130 -120 -110 -100 -90 -80 -70 10 100 1000 10000 100000 1000000 10000000 offset frequency (hz) phase noise (dbc/hz) ref input pl133-37 output when a buffer is used to pass a signal then the buffer will add a li t tle bit of its own noise. the phase noise on the output of the buffer will be a little bit more than the phase noise in the input signal. to quantify the noise addition in the buffer we compare the phase jitter numbers from the input and the output. the difference is called "add i- tive phase jitter". the formula for the additive phase jitter is as follows: additive phase jitter = (output phase jitter) - (input phase jitter) 2 2 downloaded from: http:///
pl 133 - 37 low - power , 1.62v to 3.63v , 1 mhz to 150 mhz, 1:3 fan o ut buffer ic micrel inc. ? 2180 fortune drive ? san jose, ca 95131 ? usa ? tel +1(408) 944 - 0800 ? fax +1(408) 474 - 1000 ? www.micrel.com rev 02/ 24 /15 page 5 package drawings ( green package compliant) sot23 - 6l ordering information ( green package compliant) micrel inc., reserves the right to make changes in its products or specifications, or both at any time without notice. the information furnished by micrel is believed to be accurate and reliable. however, micrel makes no guarantee or warranty concerning the accuracy of said information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product. life support policy : micrel?s products are not authorized for use as critical components in life support devices or sy stems without the express written approval of the president of micrel inc. symbol dimension in mm min. max. a 1.05 1.35 a1 0.05 0.15 a2 1.00 1.20 b 0.30 0.50 c 0.08 0.20 d 2.80 3.00 e 1.50 1. 70 h 2.60 3.00 l 0.35 0.55 e 0.95 bsc for part ordering, please contact our sales department: 21 80 fortune drive, san jose, ca 95131 , usa tel: (408) 944 - 0800 fax: (408) 474 -1 000 part number the order number for this device is a combination of the following: part number, package type and operating temperature range pl133 - 37 x x - x part number package type t = sot23 -6l temperature range c= commercial (0 c to 70c ) none = tubes r= tape and reel part /order number marking package option pl133 -3 7tc -r h37 lll 6- pin sot 23 (tape and reel) pl133 - 37ti -r *note: ll l designates lot number c l a2 e h d a1 e b a pin 1 dot downloaded from: http:///
|
